Expand description
Architecture-specific types and operations.
Structs§
- Extended state of a task, such as FP/SIMD states.
- A 512-byte memory region for the FXSAVE/FXRSTOR instruction to save and restore the x87 FPU, MMX, XMM, and MXCSR registers.
- A wrapper of the Global Descriptor Table (GDT) with maximum 16 entries.
- A wrapper of the Interrupt Descriptor Table (IDT).
- Saved hardware states of a task.
- In 64-bit mode the TSS holds information that is not directly related to the task-switch mechanism, but is used for finding kernel level stack if interrupts arrive while in kernel mode.
- Saved registers when a trap (interrupt or exception) occurs.
Functions§
- Makes the current CPU to ignore interrupts.
- Allows the current CPU to respond to interrupts.
- Flushes the TLB.
- Halt the current CPU.
- Returns whether the current CPU is allowed to respond to interrupts.
- Reads the register that stores the current page table root.
- Reads the thread pointer of the current CPU.
- Relaxes the current CPU and waits for interrupts.
- Writes the register to update the current page table root.
- Writes the thread pointer of the current CPU.